May 26, 2024

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This publish was co-authored by Giancarlo DiPasquale, Microsoft Director, Semiconductor & EDA; Rajat Chaudhry, Product Administration Director, Cadence; and Adrian Lao, Senior Software program Architect, Cadence.

With the arrival of AI and hyperscale designs on superior nodes, it’s common to see designs in over 50 billion transistor classes with tens to 100 billion plus nodes within the on-chip energy community. This explosion in scale requires options that meet the next necessities:

  • Excessive efficiency and capability.
  • Elasticity.
  • Handle various compute useful resource necessities.
  • Low value to handle the exponential improve in compute necessities.

Voltus on Azure

Voltus is a number one IC Energy Integrity Signoff Resolution from Cadence Design Techniques. It’s utilized by prime chip design firms to confirm the reliability of their energy networks on chip (NoC) and permits energy integrity and thermal evaluation on the system stage.

Microsoft Azure gives a cloud-based high-performance computing (HPC) infrastructure with safety, reliability, and scalability that could be a pure match for digital design automation (EDA) workloads, particularly energy integrity evaluation.

Azure can help each a hybrid mannequin in addition to an all-in mannequin. Within the hybrid mannequin clients primarily use their on-premises infrastructure however can add to their compute and storage capability on an on-demand foundation to fulfill peak demand. The hybrid strategy is often utilized by clients new to utilizing the cloud. In an all-in mannequin, clients primarily use Azure infrastructure for all their EDA workloads. The all-in mannequin is a good use case for startups and clients who actually wish to optimize their prices whereas benefiting from the dimensions and suppleness of Azure. Voltus helps each the hybrid in addition to the all-in mannequin with Azure.

Managing variable compute prices by way of the design cycle

Utilizing Azure will help clients optimize their prices as compute necessities will fluctuate by way of the design cycle with decrease necessities early on and peak demand close to signoff. That is in distinction to the excessive mounted value of on-premises infrastructure.

Working Voltus on Azure

We’ve got used a block and full Chip take a look at case to exhibit our outcomes.

Chart indicating the design level and power grid nodes for each design name.

The Azure crew chosen Edsv4 digital machines (VMs) based mostly on second-generation Intel Xeon Platinum 8272CL (Cascade Lake). These VMs are properly fitted to each compute and memory-intensive workloads.

The Voltus use case setup on Azure is illustrated in Determine 1.

Design architecture used by Voltus use case on Microsoft Azure.

Determine 1

Excessive efficiency and elasticity

Voltus has a completely distributed and scalable structure. Each step of the ability integrity evaluation movement, from design parsing to the solver, is absolutely distributed and scalable. Knowledge from every a part of the robotically partitioned design is assigned to compute nodes on the compute infrastructure for numerous steps within the evaluation. This course of is managed by a grasp machine as illustrated in Determine 2.

View of Voltus’s process, as managed by a master machine.

Determine 2

The extent of distribution is user-controlled, which permits the consumer to benefit from compute elasticity and handle efficiency. As Determine three illustrates for each the block and full chip run, we observe near-linear scalability in efficiency with respect to the variety of CPUs.

Charts and illustrations showing the block and full chip runs and observation of near-linear scalability in performance with respect to the number of CPUs.

Determine three

Greater efficiency with decrease prices

Consider it or not, that’s certainly true. The elasticity of Voltus structure permits the software to run sooner with the next variety of CPUs and because the CPUs are used for a smaller period of time, the result’s that the whole value drops to an optimum level. This may be seen at each the block and full chip ranges as illustrated in Determine three. This can be a win-win scenario the place you’ll be able to enhance your efficiency and scale back your prices.

Picture4a

Chart showing the block level design cost, showing that a higher number of CPUs optimizes costs, showing you can improve your performance and reduce costs.

Determine four

The magic of Voltus hierarchical evaluation

Designers can additional improve their efficiency and scale back value through the use of Voltus XM hierarchical evaluation. With Voltus XM, block-level fashions can be utilized as a substitute of the complete flattened design as illustrated in Determine 5. This methodology considerably reduces node rely whereas sustaining accuracy. We are able to even additional scale back our runtime and prices with Voltus XM and Azure. We observe a four.5x discount in value and a 2x enchancment in efficiency over the flat run for the complete chip take a look at case (Determine 6).

Image representation showing that with Voltus XM, block-level models can be used instead of the full flattened design.

Determine 5

Charts showing a 4.5 times reduction in cost with a 2 times improvement in performance over the flat run for the full chip test case, using Voltus XM and Azure.

Determine 6

We’ve got demonstrated the advantage of utilizing Voltus on Azure at each the block stage and chip stage. These benchmarks present that clients can’t solely simply profit from greater efficiency utilizing elastic compute, however there may be an optimum level for efficiency and price. Utilizing Voltus XM hierarchical evaluation additional improves value and efficiency. With Voltus on Azure, semiconductor firms have the best answer to confirm energy integrity for his or her most complicated designs.

Study extra about Voltus on Azure

Please contact your Cadence gross sales consultant for assist enabling Voltus on Azure.

 


 

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